Search publications by date:
1995 | 1996 | 1997 | 1998 | 1999 | 2000 | 2001 | 2002 | 2003 | 2004
2005 | 2006 | 2007 | 2008 | 2009 | 2010 | 2011 | 2012 | 2013 | 2014
2015 | 2016 | 2017 | 2018 | 2019 | 2020 | Latest | Forthcoming
BibTeX - Year 2018

Publications dated 2018

February 2018

Davide Bellizia. Design Methodologies for Cryptographic Hardware with Countermeasures Against Side Channel Attacks, February 2018 BibTeX

March 2018

Davide Bellizia, Simone Bongiovanni, Pietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti, and Francesco Bruno Trotta. Secure Double Rate Registers as an RTL Countermeasure Against Power Analysis Attacks, In IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 26, pages 1368-1376, March 2018 BibTeX

May 2018

Davide Bellizia, Giuseppe Scotti, and Alessandro Trifiletti. Secure Implementation of TEL-compatible Flip-Flops using a Standard-Cell Approach, 2018 IEEE International Symposium on Circuits and Systems (ISCAS), IEEE, May 2018 BibTeX

June 2018

Ran Canetti, Ling Cheung, Dilsun Kaynar, Moses Liskov, Nancy Lynch, Olivier Pereira, and Roberto Segala. Task-structured probabilistic I/O automata, In Journal of Computer and System Sciences, Volume 94, pages 63-97, June 2018 PDF BibTeX

July 2018

Kashif Nawaz, Léopold Van Brandt, François-Xavier Standaert, and Denis Flandre. Let's make it Noisy: A Simulation Methodology for adding Intrinsic Physical Noise to Cryptographic Designs, PhD Research in Microelectronics and Electronics (PRIME 2018), Prague, Czech Republic, IEEE Circuits and Systems Society, IEEE, July 2018, 10.1109/PRIME.2018.8430315 BibTeX

Florentin Rochet, and Olivier Pereira. Dropping on the Edge: Flexibility and Traffic Confirmation in Onion Routing Protocols, In PoPETs, July 2018 PDF BibTeX

August 2018

Davide Bellizia, Gaetano Palumbo, Giuseppe Scotti, and Alessandro Trifiletti. A Novel Very Low Voltage Topology to implement MCML XOR Gates, 2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), IEEE, August 2018 BibTeX

Davide Bellizia, Giuseppe Scotti, and Alessandro Trifiletti. TEL Logic Style as a Countermeasure Against Side-Channel Attacks: Secure Cells Library in 65nm CMOS and Experimental Results, In IEEE Transactions on Circuits and Systems I: Regular Papers, Volume 65-11, pages 3874-3884, August 2018 BibTeX

September 2018

Benoit Libert, Thomas Peters, and Chen Qian. Logarithmic-Size Ring Signatures With Tight Security from the DDH Assumption, In Javier Lopez, Jianying Zhou, Miguel Soriano, editor(s), Esorics 2018, Lecture Notes in Computer Science, pages 288--308, Springer, September 2018, To appear BibTeX

Florentin Rochet. Diversity and Traffic Confirmation in the Tor Network, September 2018 PDF BibTeX

October 2018

Dina Heidar Kamel, Davide Bellizia, François-Xavier Standaert, Denis Flandre, and David Bol. Demonstrating an LPPN Processor, ASHES '18, pages 18-23, ACM, October 2018 BibTeX

November 2018

Kashif Nawaz, Itamar Levi, François-Xavier Standaert, and Denis Flandre. A Transient Noise Analysis of Secured Dual-Rail Based Logic Style, 2nd New Generation of Circuits & Systems Conference, NGCAS, IEEE Circuits and Systems Society, IEEE, November 2018, to appear BibTeX

Copyright Notice

(click here to expand/retract)