@ARTICLE{cgUCL-MSQ08,
 	AUTHOR={Mace, François and Standaert, François-Xavier and Quisquater, Jean-Jacques},
	TITLE={{FPGA Implementation(s) of a Scalable Encryption Algorithm}},
	PUBLISHER={IEEE Circuits and Systems Society,  IEEE},
	EDITOR={IEEE},
	JOURNAL={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
	VOLUME={16},
	PAGES={212-216},
	MONTH={2},
	YEAR={2008},
}

@INPROCEEDINGS{cgUCL-MSQ07,
 	AUTHOR={Mace, François and Standaert, François-Xavier and Quisquater, Jean-Jacques},
	TITLE={{Simulation-Based Evaluation of Logic Styles to Counteract Side-Channel Attacks}},
	BOOKTITLE={Workshop on Cryptographic Hardware and Embedded Systems (CHES 2007)},
	PUBLISHER={Springer},
	SERIES={Lecture Notes in Computer Sciences},
	VOLUME={4727},
	PAGES={427-442},
	MONTH={9},
	YEAR={2007},
}

@INPROCEEDINGS{cgUCL-MSQ07,
 	AUTHOR={Mace, François and Standaert, François-Xavier and Quisquater, Jean-Jacques},
	TITLE={{ASIC Implementations of the Block Cipher SEA for Constrained Applications}},
	BOOKTITLE={Proceedings of the Third International Conference on RFID Security - RFIDSec 2007},
	PAGES={103-114},
	MONTH={7},
	YEAR={2007},
}

@ARTICLE{cgUCL-HMFL07,
 	AUTHOR={Hassoune, Ilham and Mace, François and Flandre, Denis and Legat, Jean-Didier},
	TITLE={{Dynamic differential self-timed logic families for robust and low-power security ICs}},
	PUBLISHER={Elsevier},
	JOURNAL={INTEGRATION, the VLSI Journal},
	VOLUME={40},
	PAGES={355-364},
	MONTH={3},
	YEAR={2007},
}

@ARTICLE{cgUCL-HMFL06,
 	AUTHOR={Hassoune, Ilham and Mace, François and Flandre, Denis and Legat, Jean-Didier},
	TITLE={{Low-swing current mode logic (LSCML): a new logic style for secure and robust smart cards against power analysis attacks.}},
	PUBLISHER={Elsevier},
	EDITOR={B. Courtois, M. Henini},
	JOURNAL={Microelectronics Journal},
	VOLUME={37},
	PAGES={997-1006},
	MONTH={5},
	YEAR={2006},
}

@INPROCEEDINGS{cgUCL-SMPQ06,
 	AUTHOR={Standaert, François-Xavier and Mace, François and Peeters, Eric and Quisquater, Jean-Jacques},
	TITLE={{Updates on the Security of FPGAs Against Power Analysis Attacks}},
	BOOKTITLE={ARC},
	VOLUME={3985},
	PAGES={335-346},
	MONTH={3},
	YEAR={2006},
}

@INPROCEEDINGS{cgUCL-MSQL05,
 	AUTHOR={Mace, François and Standaert, François-Xavier and Quisquater, Jean-Jacques and Legat, Jean-Didier},
	TITLE={{A Design Methodology for Secured ICs Using Dynamic Current Mode Logic}},
	BOOKTITLE={Power and Timing Modeling, Optimization and Simulation - Proceedings of PATMOS 2005},
	PUBLISHER={Springer},
	EDITOR={V. Paliouras},
	SERIES={Lecture Notes in Computer Science},
	PAGES={550-560},
	MONTH={9},
	YEAR={2005},
}

@INPROCEEDINGS{cgUCL-MSLQ05,
 	AUTHOR={Mace, François and Standaert, François-Xavier and Legat, Jean-Didier and Quisquater, Jean-Jacques},
	TITLE={{Recommendations for Secure IC's and ASIC's}},
	BOOKTITLE={CEPA2 Workshop - What Technologies in Defence Applications for Digital Signal Processing Now and in the Future},
	PAGES={NA},
	MONTH={3},
	YEAR={2005},
}

@INPROCEEDINGS{cgUCL-MSHQL04,
 	AUTHOR={Mace, François and Standaert, François-Xavier and Hassoune, Ilham and Quisquater, Jean-Jacques and Legat, Jean-Didier},
	TITLE={{A Dynamic Current Mode Logic to Counteract Power Analysis Attacks}},
	BOOKTITLE={DCIS 2004 - 19th Conference on Design of Circuits and Integrated Systems},
	PAGES={186-191},
	MONTH={11},
	YEAR={2004},
}