@INPROCEEDINGS{cgUCL-SOP04,
 	AUTHOR={Standaert, Fran├žois-Xavier and Ors, Siddika Berna and Preneel, Bart},
	TITLE={{Power Analysis of an FPGA Implementation of Rijndael: Is Pipelining a DPA Countermeasure?}},
	BOOKTITLE={CHES 2004},
	PUBLISHER={Springer-Verlag},
	SERIES={Lecture Notes in Computer Science},
	PAGES={30-44},
	MONTH={1},
	YEAR={2004},
}