@ARTICLE{cgUCL-BBMSTT18,
 	AUTHOR={Bellizia, Davide and Bongiovanni, Simone and MonsurrĂ², Pietro and Scotti, Giuseppe and Trifiletti, Alessandro and Trotta, Francesco Bruno},
	TITLE={{Secure Double Rate Registers as an RTL Countermeasure Against Power Analysis Attacks}},
	JOURNAL={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
	VOLUME={26},
	PAGES={1368-1376},
	MONTH={3},
	YEAR={2018},
}